TY - GEN
T1 - Reconfigurable BDD based quantum circuits
AU - Eachempati, Soumya
AU - Saripalli, Vinay
AU - Vijaykrishnan, N.
AU - Datta, Suman
PY - 2008
Y1 - 2008
N2 - We propose a novel binary decision diagram (BDD) based reconfigurable logic architecture based on Split-Gate quantum nanodots using III-V compound semiconductor-based quantum wells. While BDD based quantum devices architectures have already been demonstrated to be attractive for achieving ultra-low power operation, our design provides the ability to reconfigure the functionality of the logic architecture. This work proposes device and architectural innovations to support such reconfiguration. At the device level, a unique programmability feature is incorporated in our proposed nanodot devices which can operate in 3 distinct operation modes: a) active b) open and c) short mode based on the split gate bias voltages and enable functional reconfiguration. At the architectural level, we address programmability and design fabric issues involved with mapping BDD's into a reconfigurable architecture. By mapping a set of logic circuits, we demonstrate that our underlying device and architectural structure is flexible to support different functions.
AB - We propose a novel binary decision diagram (BDD) based reconfigurable logic architecture based on Split-Gate quantum nanodots using III-V compound semiconductor-based quantum wells. While BDD based quantum devices architectures have already been demonstrated to be attractive for achieving ultra-low power operation, our design provides the ability to reconfigure the functionality of the logic architecture. This work proposes device and architectural innovations to support such reconfiguration. At the device level, a unique programmability feature is incorporated in our proposed nanodot devices which can operate in 3 distinct operation modes: a) active b) open and c) short mode based on the split gate bias voltages and enable functional reconfiguration. At the architectural level, we address programmability and design fabric issues involved with mapping BDD's into a reconfigurable architecture. By mapping a set of logic circuits, we demonstrate that our underlying device and architectural structure is flexible to support different functions.
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U2 - 10.1109/NANOARCH.2008.4585793
DO - 10.1109/NANOARCH.2008.4585793
M3 - Conference contribution
AN - SCOPUS:51949107323
SN - 9781424425532
T3 - 2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008
SP - 61
EP - 67
BT - 2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008
T2 - 2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008
Y2 - 12 June 2008 through 13 June 2008
ER -