Reducing energy consumption of multiprocessor SoC architectures by exploiting memory bank locality

Keyphrases

• Memory Systems 100%
• Energy Consumption Reduction 100%
• Memory Bank 100%
• Multiprocessor SoC 100%
• SoC Architecture 100%
• Low Power 50%
• Energy Consumption 50%
• Small Sets 50%
• Iterative Process 50%
• Power Consumption 50%
• Multiprocessor Systems 50%
• Power Issue 50%
• Embedded Applications 50%
• Data Memory 50%
• Power Control 50%
• Data Computation 50%
• Mathematical Formulation 50%
• Interprocessor Communications 50%
• Heuristic Solution 50%
• Multiple Processors 50%
• Execution Cycle 50%
• Parallel Machines 50%
• On-a-chip 50%
• Operating Mode 50%
• On-chip Memory 50%
• Overall Power 50%
• System Energy Consumption 50%
• Matrix Equation 50%
• Off-chip Memory Access 50%
• Data Access Pattern 50%
• Degradation Degree 50%
• Low Power Mode 50%
• Data-driven Optimization 50%
• Code Optimization 50%
• Embedded Architecture 50%

Computer Science

• Energy Consumption 100%
• multi-processor 100%
• System-on-Chip 100%
• Memory System 66%
• Experimental Result 33%
• Power Consumption 33%
• Multiprocessor System 33%
• Embedded Application 33%
• Image Processing 33%
• Multiple Processor 33%
• System on a Chip 33%
• Iterative Process 33%
• Video Processing 33%
• Parallel Machine 33%
• Heuristic Solution 33%
• Chip Memory Access 33%
• Data Access Pattern 33%
• Chip Architecture 33%
• Matrix Equation 33%
• Operating Mode 33%