TY - GEN
T1 - Reliability-aware design for nanometer-scale devices
AU - Atienza, David
AU - De Micheli, Giovanni
AU - Benini, Luca
AU - Ayala, José L.
AU - Del Valle, Pablo G.
AU - DeBole, Michael
AU - Narayanan, Vijay
PY - 2008
Y1 - 2008
N2 - Continuous transistor scaling due to improvements in CMOS devices and manufacturing technologies is increasing processor power densities and temperatures; thus, creating challenges to maintain manufacturing yield rates and reliable devices in their expected lifetimes for latest nanometer-scale dimensions. In fact, new system and processor microarchitectures require new reliability-aware design methods and exploration tools that can face these challenges without significantly increasing manufacturing cost, reducing system performance or imposing large area overheads due to redundancy. In this paper we overview the latest approaches in reliability modeling and variability-tolerant design for latest technology nodes, and advocate the need of reliability-aware design for forthcoming consumer electronics. Moreover, we illustrate with a case study of an embedded processor that effective reliability-aware design can be achieved in nanometer-scale devices through integral design approaches that covers modeling and exploration of reliability effects, and hardware-software architectural techniques to provide reliability-enhanced solutions at both microarchitectural- and system-level.
AB - Continuous transistor scaling due to improvements in CMOS devices and manufacturing technologies is increasing processor power densities and temperatures; thus, creating challenges to maintain manufacturing yield rates and reliable devices in their expected lifetimes for latest nanometer-scale dimensions. In fact, new system and processor microarchitectures require new reliability-aware design methods and exploration tools that can face these challenges without significantly increasing manufacturing cost, reducing system performance or imposing large area overheads due to redundancy. In this paper we overview the latest approaches in reliability modeling and variability-tolerant design for latest technology nodes, and advocate the need of reliability-aware design for forthcoming consumer electronics. Moreover, we illustrate with a case study of an embedded processor that effective reliability-aware design can be achieved in nanometer-scale devices through integral design approaches that covers modeling and exploration of reliability effects, and hardware-software architectural techniques to provide reliability-enhanced solutions at both microarchitectural- and system-level.
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U2 - 10.1109/ASPDAC.2008.4484011
DO - 10.1109/ASPDAC.2008.4484011
M3 - Conference contribution
AN - SCOPUS:49549092447
SN - 9781424419227
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 549
EP - 554
BT - 2008 Asia and South Pacific Design Automation Conference, ASP-DAC
T2 - 2008 Asia and South Pacific Design Automation Conference, ASP-DAC
Y2 - 21 March 2008 through 24 March 2008
ER -