Abstract
Downscaling of package wiring has been the singular focus to achieve higher logic-memory interconnect density to meet next-generation needs for high-bandwidth computing. This article presents, for the first time, a systematic modeling and experimental study of sub-5- $\mu \text{m}$ -diameter microvia reliability. Geometry design considerations and build-up dielectric material properties in evaluating the microvia fatigue life are investigated. Finally, experimental thermal-cycling reliability results of sub-5- $\mu \text{m}$ -diameter microvias are correlated with the modeling results.
Original language | English (US) |
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Article number | 9153015 |
Pages (from-to) | 1552-1559 |
Number of pages | 8 |
Journal | IEEE Transactions on Components, Packaging and Manufacturing Technology |
Volume | 10 |
Issue number | 9 |
DOIs | |
State | Published - Sep 2020 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering