Reliability of Fine-Pitch μm-Diameter Microvias for High-Density Interconnects

Shreya Dwarakanath; Takenori Kakutani; Daichi Okamoto; Pulugurtha Markondeya Raj; Madhavan Swaminathan; Rao R. Tummala

doi:10.1109/TCPMT.2020.3013197

Reliability of Fine-Pitch μm-Diameter Microvias for High-Density Interconnects

Shreya Dwarakanath
, Takenori Kakutani
, Daichi Okamoto
, Pulugurtha Markondeya Raj
, Madhavan Swaminathan
, Rao R. Tummala

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

10 Scopus citations

Abstract

Downscaling of package wiring has been the singular focus to achieve higher logic-memory interconnect density to meet next-generation needs for high-bandwidth computing. This article presents, for the first time, a systematic modeling and experimental study of sub-5- $\mu \text{m}$ -diameter microvia reliability. Geometry design considerations and build-up dielectric material properties in evaluating the microvia fatigue life are investigated. Finally, experimental thermal-cycling reliability results of sub-5- $\mu \text{m}$ -diameter microvias are correlated with the modeling results.

Original language	English (US)
Article number	9153015
Pages (from-to)	1552-1559
Number of pages	8
Journal	IEEE Transactions on Components, Packaging and Manufacturing Technology
Volume	10
Issue number	9
DOIs	https://doi.org/10.1109/TCPMT.2020.3013197
State	Published - Sep 2020

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Industrial and Manufacturing Engineering
Electrical and Electronic Engineering

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10.1109/TCPMT.2020.3013197

Cite this

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title = "Reliability of Fine-Pitch μm-Diameter Microvias for High-Density Interconnects",

abstract = "Downscaling of package wiring has been the singular focus to achieve higher logic-memory interconnect density to meet next-generation needs for high-bandwidth computing. This article presents, for the first time, a systematic modeling and experimental study of sub-5- \$\textbackslash{}mu \textbackslash{}text\{m\}\$ -diameter microvia reliability. Geometry design considerations and build-up dielectric material properties in evaluating the microvia fatigue life are investigated. Finally, experimental thermal-cycling reliability results of sub-5- \$\textbackslash{}mu \textbackslash{}text\{m\}\$ -diameter microvias are correlated with the modeling results.",

author = "Shreya Dwarakanath and Takenori Kakutani and Daichi Okamoto and Raj, \{Pulugurtha Markondeya\} and Madhavan Swaminathan and Tummala, \{Rao R.\}",

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AU - Dwarakanath, Shreya

AU - Kakutani, Takenori

AU - Okamoto, Daichi

AU - Raj, Pulugurtha Markondeya

AU - Swaminathan, Madhavan

AU - Tummala, Rao R.

PY - 2020/9

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AB - Downscaling of package wiring has been the singular focus to achieve higher logic-memory interconnect density to meet next-generation needs for high-bandwidth computing. This article presents, for the first time, a systematic modeling and experimental study of sub-5- $\mu \text{m}$ -diameter microvia reliability. Geometry design considerations and build-up dielectric material properties in evaluating the microvia fatigue life are investigated. Finally, experimental thermal-cycling reliability results of sub-5- $\mu \text{m}$ -diameter microvias are correlated with the modeling results.

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ER -

Reliability of Fine-Pitch μm-Diameter Microvias for High-Density Interconnects

Abstract

All Science Journal Classification (ASJC) codes

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