TY - GEN
T1 - RF substrates yield improvement using package-chip co-design and on-chip calibration
AU - Goyal, Abhilash
AU - Swaminathan, Madhavan
AU - Chatterjee, Abhijit
PY - 2010
Y1 - 2010
N2 - In this paper, yield improvement methodology is proposed for RF substrates with embedded RF passive circuitry. The proposed methodology introduces a concept of package-chip co-design and on-chip calibration of active circuitry for the yield improvement of off-chip passive embedded RF filters. RF receiver architecture for the package-chip co-design and on-chip calibration technique is presented. Using the proposed methodology, it is shown that the yield of RF substrates is improved from 88% to 98%. Also, the measurements results are presented.
AB - In this paper, yield improvement methodology is proposed for RF substrates with embedded RF passive circuitry. The proposed methodology introduces a concept of package-chip co-design and on-chip calibration of active circuitry for the yield improvement of off-chip passive embedded RF filters. RF receiver architecture for the package-chip co-design and on-chip calibration technique is presented. Using the proposed methodology, it is shown that the yield of RF substrates is improved from 88% to 98%. Also, the measurements results are presented.
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U2 - 10.1109/EDAPS.2010.5683018
DO - 10.1109/EDAPS.2010.5683018
M3 - Conference contribution
AN - SCOPUS:79851485657
SN - 9781424490684
T3 - 2010 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2010
BT - 2010 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2010
T2 - 2010 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2010
Y2 - 7 December 2010 through 9 December 2010
ER -