TY - GEN
T1 - Ring prediction for non-uniform cache architectures
AU - Akioka, Sayaka
AU - Li, Feihui
AU - Kandemir, Mahmut
AU - Raghavan, Padma
AU - Irwin, Mary Jane
PY - 2007
Y1 - 2007
N2 - Increasing wire delays and memory capacities motivate new ways of designing L2 and L3 caches. NUCA (Non-Uniform Cache Architecture) has received considerable attention in the last few years. While most of the prior NUCA-based efforts have focused on data placement, data replacement, and migration related issues, this paper studies the problem of data search. Specifically, it proposes and experimentally evaluates several data search schemes for NUCA L2 caches that exhibit different performance-power trade-offs. These schemes are based on predicting the next ring (set of banks) to be accessed in a NUCA L2, and checking the banks in that ring first. In this work, we present the details of these prediction schemes, and compare them to two alternate approaches: searching all rings in parallel, and searching rings sequentially, starting with the one that is closest to the CPU.
AB - Increasing wire delays and memory capacities motivate new ways of designing L2 and L3 caches. NUCA (Non-Uniform Cache Architecture) has received considerable attention in the last few years. While most of the prior NUCA-based efforts have focused on data placement, data replacement, and migration related issues, this paper studies the problem of data search. Specifically, it proposes and experimentally evaluates several data search schemes for NUCA L2 caches that exhibit different performance-power trade-offs. These schemes are based on predicting the next ring (set of banks) to be accessed in a NUCA L2, and checking the banks in that ring first. In this work, we present the details of these prediction schemes, and compare them to two alternate approaches: searching all rings in parallel, and searching rings sequentially, starting with the one that is closest to the CPU.
UR - http://www.scopus.com/inward/record.url?scp=47849111521&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=47849111521&partnerID=8YFLogxK
U2 - 10.1109/PACT.2007.4336229
DO - 10.1109/PACT.2007.4336229
M3 - Conference contribution
AN - SCOPUS:47849111521
SN - 0769529445
SN - 9780769529448
T3 - Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
SP - 401
BT - 16th International Conference on Parallel Architecture and Compilation Techniques, PACT 2007
T2 - 16th International Conference on Parallel Architecture and Compilation Techniques, PACT 2007
Y2 - 15 September 2007 through 19 September 2007
ER -