Role of metal-1 layout in plasma processing-induced damage

Motasim G. El Hassan; Osama O. Awadelkarim; Jim Werking

doi:10.1109/ppid.1997.596763

Role of metal-1 layout in plasma processing-induced damage

Motasim G. El Hassan, Osama O. Awadelkarim, Jim Werking

Engineering Science and Mechanics

Research output: Contribution to conference › Paper › peer-review

1 Scopus citations

Abstract

The possible role of the interconnect layout in plasma processing-induced damage is Investigated. Two sets of LDD n-MOSFETs with different metal 1 layouts are examined and compared to devices with larger metal gate antennae. The results clearly indicate that interconnect layouts may invoke MOSFET's degradation mechanisms different than the conventional plasma processing-induced capacitive charging of the gate oxide by gate antenna.

Original language	English (US)
Pages	251-254
Number of pages	4
DOIs	https://doi.org/10.1109/ppid.1997.596763
State	Published - 1997
Event	Proceedings of the 1997 2nd International Symposium on Plasma Process-Induced Damage - Monterey, CA, USA Duration: May 13 1997 → May 14 1997

Other

Other	Proceedings of the 1997 2nd International Symposium on Plasma Process-Induced Damage
City	Monterey, CA, USA
Period	5/13/97 → 5/14/97

All Science Journal Classification (ASJC) codes

General Engineering

Access to Document

10.1109/ppid.1997.596763

Cite this

@conference{47c0a92c4f1f41189de90afb05f7458d,

title = "Role of metal-1 layout in plasma processing-induced damage",

abstract = "The possible role of the interconnect layout in plasma processing-induced damage is Investigated. Two sets of LDD n-MOSFETs with different metal 1 layouts are examined and compared to devices with larger metal gate antennae. The results clearly indicate that interconnect layouts may invoke MOSFET's degradation mechanisms different than the conventional plasma processing-induced capacitive charging of the gate oxide by gate antenna.",

author = "\{El Hassan\}, \{Motasim G.\} and Awadelkarim, \{Osama O.\} and Jim Werking",

year = "1997",

doi = "10.1109/ppid.1997.596763",

language = "English (US)",

pages = "251--254",

note = "Proceedings of the 1997 2nd International Symposium on Plasma Process-Induced Damage ; Conference date: 13-05-1997 Through 14-05-1997",

}

TY - CONF

T1 - Role of metal-1 layout in plasma processing-induced damage

AU - El Hassan, Motasim G.

AU - Awadelkarim, Osama O.

AU - Werking, Jim

PY - 1997

Y1 - 1997

N2 - The possible role of the interconnect layout in plasma processing-induced damage is Investigated. Two sets of LDD n-MOSFETs with different metal 1 layouts are examined and compared to devices with larger metal gate antennae. The results clearly indicate that interconnect layouts may invoke MOSFET's degradation mechanisms different than the conventional plasma processing-induced capacitive charging of the gate oxide by gate antenna.

AB - The possible role of the interconnect layout in plasma processing-induced damage is Investigated. Two sets of LDD n-MOSFETs with different metal 1 layouts are examined and compared to devices with larger metal gate antennae. The results clearly indicate that interconnect layouts may invoke MOSFET's degradation mechanisms different than the conventional plasma processing-induced capacitive charging of the gate oxide by gate antenna.

UR - https://www.scopus.com/pages/publications/0030678432

UR - https://www.scopus.com/inward/citedby.url?scp=0030678432&partnerID=8YFLogxK

U2 - 10.1109/ppid.1997.596763

DO - 10.1109/ppid.1997.596763

M3 - Paper

AN - SCOPUS:0030678432

SP - 251

EP - 254

T2 - Proceedings of the 1997 2nd International Symposium on Plasma Process-Induced Damage

Y2 - 13 May 1997 through 14 May 1997

ER -

Role of metal-1 layout in plasma processing-induced damage

Abstract

Other

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this