TY - JOUR
T1 - Scalable Digital Neuromorphic Architecture for Large-Scale Biophysically Meaningful Neural Network with Multi-Compartment Neurons
AU - Yang, Shuangming
AU - Deng, Bin
AU - Wang, Jiang
AU - Li, Huiyan
AU - Lu, Meili
AU - Che, Yanqiu
AU - Wei, Xile
AU - Loparo, Kenneth A.
N1 - Funding Information:
Manuscript received March 6, 2018; revised September 7, 2018 and December 24, 2018; accepted February 13, 2019. Date of publication March 18, 2019; date of current version January 3, 2020. This work was supported in part by the National Natural Science Foundation of China under Grant 61471265, Grant 61501330, and Grant 61771330 and in part by the Tianjin Municipal Special Program of Talents Development for Excellent Youth Scholars under Grant TJTZJH-QNBJRC-2-21. (Corresponding author: Xile Wei.) S. Yang, B. Deng, J. Wang, and X. Wei are with the School of Electrical and Information Engineering, Tianjin University, Tianjin 300072, China (e-mail: yangshuangming@tju.edu.cn; dengbin@tju.edu.cn; jiangwang@tju.edu.cn; xilewei@tju.edu.cn).
Publisher Copyright:
© 2012 IEEE.
PY - 2020/1
Y1 - 2020/1
N2 - Multicompartment emulation is an essential step to enhance the biological realism of neuromorphic systems and to further understand the computational power of neurons. In this paper, we present a hardware efficient, scalable, and real-time computing strategy for the implementation of large-scale biologically meaningful neural networks with one million multi-compartment neurons (CMNs). The hardware platform uses four Altera Stratix III field-programmable gate arrays, and both the cellular and the network levels are considered, which provides an efficient implementation of a large-scale spiking neural network with biophysically plausible dynamics. At the cellular level, a cost-efficient multi-CMN model is presented, which can reproduce the detailed neuronal dynamics with representative neuronal morphology. A set of efficient neuromorphic techniques for single-CMN implementation are presented with all the hardware cost of memory and multiplier resources removed and with hardware performance of computational speed enhanced by 56.59% in comparison with the classical digital implementation method. At the network level, a scalable network-on-chip (NoC) architecture is proposed with a novel routing algorithm to enhance the NoC performance including throughput and computational latency, leading to higher computational efficiency and capability in comparison with state-of-the-art projects. The experimental results demonstrate that the proposed work can provide an efficient model and architecture for large-scale biologically meaningful networks, while the hardware synthesis results demonstrate low area utilization and high computational speed that supports the scalability of the approach.
AB - Multicompartment emulation is an essential step to enhance the biological realism of neuromorphic systems and to further understand the computational power of neurons. In this paper, we present a hardware efficient, scalable, and real-time computing strategy for the implementation of large-scale biologically meaningful neural networks with one million multi-compartment neurons (CMNs). The hardware platform uses four Altera Stratix III field-programmable gate arrays, and both the cellular and the network levels are considered, which provides an efficient implementation of a large-scale spiking neural network with biophysically plausible dynamics. At the cellular level, a cost-efficient multi-CMN model is presented, which can reproduce the detailed neuronal dynamics with representative neuronal morphology. A set of efficient neuromorphic techniques for single-CMN implementation are presented with all the hardware cost of memory and multiplier resources removed and with hardware performance of computational speed enhanced by 56.59% in comparison with the classical digital implementation method. At the network level, a scalable network-on-chip (NoC) architecture is proposed with a novel routing algorithm to enhance the NoC performance including throughput and computational latency, leading to higher computational efficiency and capability in comparison with state-of-the-art projects. The experimental results demonstrate that the proposed work can provide an efficient model and architecture for large-scale biologically meaningful networks, while the hardware synthesis results demonstrate low area utilization and high computational speed that supports the scalability of the approach.
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U2 - 10.1109/TNNLS.2019.2899936
DO - 10.1109/TNNLS.2019.2899936
M3 - Article
C2 - 30892250
AN - SCOPUS:85077667164
SN - 2162-237X
VL - 31
SP - 148
EP - 162
JO - IEEE Transactions on Neural Networks and Learning Systems
JF - IEEE Transactions on Neural Networks and Learning Systems
IS - 1
M1 - 8668700
ER -