Selective plating for junction delineation in silicon nanowires

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Abstract

The in situ growth of p-n junctions in silicon nanowires enables the fabrication of a variety of nanoscale electronic devices. We have developed a method for selective coating of Au onto n-type segments of silicon nanowire p-n junctions. Selective plating allows for quick verification of the position of p-n junctions along the nanowire using electron microscopy and allows for measurement of segment length.

Original languageEnglish (US)
Pages (from-to)2642-2644
Number of pages3
JournalNano letters
Volume7
Issue number9
DOIs
StatePublished - Sep 2007

All Science Journal Classification (ASJC) codes

  • Bioengineering
  • General Chemistry
  • General Materials Science
  • Condensed Matter Physics
  • Mechanical Engineering

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