TY - GEN
T1 - Shannon expansion based supply-gated logic for improved power and testability
AU - Ghosh, S.
AU - Bhunia, S.
AU - Roy, K.
PY - 2005
Y1 - 2005
N2 - Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confidence. In this paper, we analyze the testability in a new style of logic design based on Shannon's decomposition and supply gating. We observe that tree structure of a logic circuit due to Shannon's decomposition makes it intrinsically more testable than conventionally synthesized circuit, while at the same time entailing an improvement in active power. We have analyzed three different aspects of testability of a circuit: a) IDDQ test sensitivity b) test power during scan-based testing, and c) test length (for both ATPG-generated deterministic and random patterns). Simulation results on a set of MCNC benchmarks show promising results on all the above aspects. We have also demonstrated that the new logic structure can improve parametric yield of a circuit under process variations when considering a bound on circuit leakage.
AB - Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confidence. In this paper, we analyze the testability in a new style of logic design based on Shannon's decomposition and supply gating. We observe that tree structure of a logic circuit due to Shannon's decomposition makes it intrinsically more testable than conventionally synthesized circuit, while at the same time entailing an improvement in active power. We have analyzed three different aspects of testability of a circuit: a) IDDQ test sensitivity b) test power during scan-based testing, and c) test length (for both ATPG-generated deterministic and random patterns). Simulation results on a set of MCNC benchmarks show promising results on all the above aspects. We have also demonstrated that the new logic structure can improve parametric yield of a circuit under process variations when considering a bound on circuit leakage.
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U2 - 10.1109/ATS.2005.98
DO - 10.1109/ATS.2005.98
M3 - Conference contribution
AN - SCOPUS:33846937647
SN - 0769524818
SN - 9780769524818
T3 - Proceedings of the Asian Test Symposium
SP - 404
EP - 409
BT - Proceedings - 14th Asian Test Symposium, ATS 2005
T2 - 14th Asian Test Symposium, ATS 2005
Y2 - 18 December 2005 through 21 December 2005
ER -