TY - GEN
T1 - Short Paper
T2 - Workshop on Hardware and Architectural Support for Security and Privacy, HASP 2021
AU - Aakarshitha, Suresh
AU - Abdullah Ash, Saki
AU - Mahababul, Alam
AU - Rasit, Onur Topaloglu
AU - Swaroop, Ghosh
N1 - Publisher Copyright:
© 2021 ACM.
PY - 2021/10/18
Y1 - 2021/10/18
N2 - In the Noisy Intermediate-Scale Quantum (NISQ) realm, efficient quantum circuit compilation is critical to ensure successful computation. Several third-party compilers are improving the compilation times and depth/gate counts. Untrusted third parties or a particular version of a trusted compiler may allow an attacker to steal, clone, and/or reverse engineer the quantum circuit. We propose to obfuscate quantum circuits by employing dummy CNOT gates to prevent such threats. If the adversary clones the obfuscated design, he/she will get faulty results. We propose a metric-based dummy gate insertion process to ensure maximum corruption of functionality measured using Total Variation Distance (TVD) and validated using IBM's noisy simulators. Our metric guided dummy gate insertion process achieves TVD of up to 28.83%, and performs 10.14% better than the average TVD and performs within 12.45% of the best obtainable TVD for the test benchmarks. The removal of dummy gates by the designer post-compilation to restore functionality as well as other finer details have been addressed.
AB - In the Noisy Intermediate-Scale Quantum (NISQ) realm, efficient quantum circuit compilation is critical to ensure successful computation. Several third-party compilers are improving the compilation times and depth/gate counts. Untrusted third parties or a particular version of a trusted compiler may allow an attacker to steal, clone, and/or reverse engineer the quantum circuit. We propose to obfuscate quantum circuits by employing dummy CNOT gates to prevent such threats. If the adversary clones the obfuscated design, he/she will get faulty results. We propose a metric-based dummy gate insertion process to ensure maximum corruption of functionality measured using Total Variation Distance (TVD) and validated using IBM's noisy simulators. Our metric guided dummy gate insertion process achieves TVD of up to 28.83%, and performs 10.14% better than the average TVD and performs within 12.45% of the best obtainable TVD for the test benchmarks. The removal of dummy gates by the designer post-compilation to restore functionality as well as other finer details have been addressed.
UR - http://www.scopus.com/inward/record.url?scp=85132254427&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85132254427&partnerID=8YFLogxK
U2 - 10.1145/3505253.3505260
DO - 10.1145/3505253.3505260
M3 - Conference contribution
AN - SCOPUS:85132254427
T3 - ACM International Conference Proceeding Series
BT - HASP 2021 - Workshop on Hardware and Architectural Support for Security and Privacy
PB - Association for Computing Machinery
Y2 - 18 October 2021
ER -