Simulation of switching noise in on-chip power distribution networks of FPGAs

Subramanian N. Lalgudi, Yaron Ketchmer, Madhavan Swaminathan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

An explicit approach has been used to simulate switching noise in on-chip power distribution networks. This approach has been extended to analyze on-chip power distribution networks of Field Programmable Gate Array (FPGA),whosepowerdistributionnetwork is more irregular than that of an Application Specific Integrated Circuit (ASIC). The switching noise has been compared between the on-chip power distribution networks of FPGAs and ASICs. Switching noise simulation of power/ground grids requires a static IR drop analysis before the transient simulation. The importance of performing a static IR drop analysis prior to the transient simulation has been illustrated.

Original languageEnglish (US)
Title of host publication14th Topical Meeting on Electrical Performance of Electronic Packaging 2005
Pages319-322
Number of pages4
DOIs
StatePublished - 2005
Event14th Topical Meeting on Electrical Performance of Electronic Packaging 2005 - Austin, TX, United States
Duration: Oct 24 2005Oct 26 2005

Publication series

NameIEEE Topical Meeting on Electrical Performance of Electronic Packaging
Volume2005

Conference

Conference14th Topical Meeting on Electrical Performance of Electronic Packaging 2005
Country/TerritoryUnited States
CityAustin, TX
Period10/24/0510/26/05

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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