Abstract
We describe a technique which reduces power consumption in pipelined DSP circuits by mapping full precision operations to small precision operations, using adaptive delta modulation to reduce the signal size. The discrete cosine transform example is evaluated considering issues such as power, area, delay, latency, accuracy of the system and the sampling frequency of the signal.
| Original language | English (US) |
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| Pages | 28-29 |
| Number of pages | 2 |
| State | Published - Dec 1 1995 |
| Event | Proceedings of the 1995 IEEE Symposium on Low Power Electronics - San Jose, CA, USA Duration: Oct 9 1995 → Oct 11 1995 |
Other
| Other | Proceedings of the 1995 IEEE Symposium on Low Power Electronics |
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| City | San Jose, CA, USA |
| Period | 10/9/95 → 10/11/95 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials