TY - GEN
T1 - Soft error characterization on scientific applications
AU - Ozturk, Zuhal
AU - Topcuoglu, Haluk Rahmi
AU - Arslan, Sanem
AU - Kandemir, Mahmut Taylan
N1 - Funding Information:
ACKNOWLEDGMENT This research was supported by The Scientific and Technological Research Council of Turkey (TUBITAK) with a research grant (Project Number: 113E530).
PY - 2018/10/26
Y1 - 2018/10/26
N2 - Decreasing transistor sizes, aggressive power optimization techniques and higher operation frequencies lead to increase error rates. While researchers addressed reliable computing, there is still lack of study for providing the fundamental understanding of error propagation. In this work, we characterize error propagation at software level by utilizing error propagation speed metric. It is validated on a set of commonly used iterative solvers, where the speed of error propagation is modeled for the different input-output pairs. Additionally, we study two different methods for slowing down the error propagation. Firstly, the effect of various algorithmic choices of sorting on error propagation profiles is examined whether such choices have an impact on error propagation profiles. Experimental results show that sorting algorithms differ in error propagation patterns. Secondly, different loop transformation techniques are considered for slowing down the error propagation speed. Specifically, while loop tiling causes a significant change in error propagation, the impact of loop unrolling is negligible for the given applications.
AB - Decreasing transistor sizes, aggressive power optimization techniques and higher operation frequencies lead to increase error rates. While researchers addressed reliable computing, there is still lack of study for providing the fundamental understanding of error propagation. In this work, we characterize error propagation at software level by utilizing error propagation speed metric. It is validated on a set of commonly used iterative solvers, where the speed of error propagation is modeled for the different input-output pairs. Additionally, we study two different methods for slowing down the error propagation. Firstly, the effect of various algorithmic choices of sorting on error propagation profiles is examined whether such choices have an impact on error propagation profiles. Experimental results show that sorting algorithms differ in error propagation patterns. Secondly, different loop transformation techniques are considered for slowing down the error propagation speed. Specifically, while loop tiling causes a significant change in error propagation, the impact of loop unrolling is negligible for the given applications.
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U2 - 10.1109/DASC/PiCom/DataCom/CyberSciTec.2018.00109
DO - 10.1109/DASC/PiCom/DataCom/CyberSciTec.2018.00109
M3 - Conference contribution
AN - SCOPUS:85056810482
T3 - Proceedings - IEEE 16th International Conference on Dependable, Autonomic and Secure Computing, IEEE 16th International Conference on Pervasive Intelligence and Computing, IEEE 4th International Conference on Big Data Intelligence and Computing and IEEE 3rd Cyber Science and Technology Congress, DASC-PICom-DataCom-CyberSciTec 2018
SP - 592
EP - 599
BT - Proceedings - IEEE 16th International Conference on Dependable, Autonomic and Secure Computing, IEEE 16th International Conference on Pervasive Intelligence and Computing, IEEE 4th International Conference on Big Data Intelligence and Computing and IEEE 3rd Cyber Science and Technology Congress, DASC-PICom-DataCom-CyberSciTec 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 16th IEEE International Conference on Dependable, Autonomic and Secure Computing, IEEE 16th International Conference on Pervasive Intelligence and Computing, IEEE 4th International Conference on Big Data Intelligence and Computing and IEEE 3rd Cyber Science and Technology Congress, DASC-PICom-DataCom-CyberSciTec 2018
Y2 - 12 August 2018 through 15 August 2018
ER -