Software-hardware co-design for video coding acceleration

  • Xinwei Niu
  • , Luis Galarza
  • , Ying Gao
  • , Jeffrey Fan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, an advanced video coding acceleration based on software-hardware co-design for low power embedded system is proposed. Today, people enjoy HD video formats all over the world, but to compress it into a portable format (such as H.264) costs too much time. In embedded systems, it is very costly to transform the entire software application into a hardware solution especially if it will consume a large amount of power. Thus, we studied the famous H.264 model in order to explore the hotspot function and balance the tradeoff between speed and energy consumption. The idea is to only transform the more readily used functions into hardware by designing a coprocessor and implementing it on Virtex 5 Field-Programmable Gate Array (FPGA) platform. The experimental results from this hardware implementation showed a 5 times increase in coding speed while minimizing the energy consumption to around 81 percent.

Original languageEnglish (US)
Title of host publicationProceedings of the 2012 44th Southeastern Symposium on System Theory, SSST 2012
Pages57-60
Number of pages4
DOIs
StatePublished - 2012
Event2012 44th Southeastern Symposium on System Theory, SSST 2012 - Jacksonville, FL, United States
Duration: Mar 11 2012Mar 13 2012

Publication series

NameProceedings of the Annual Southeastern Symposium on System Theory

Conference

Conference2012 44th Southeastern Symposium on System Theory, SSST 2012
Country/TerritoryUnited States
CityJacksonville, FL
Period3/11/123/13/12

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 7 - Affordable and Clean Energy
    SDG 7 Affordable and Clean Energy

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering
  • General Mathematics

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