Some issues in gray code addressing

H. Mehta, R. M. Owens, M. J. Irwin

Research output: Contribution to journalConference articlepeer-review

80 Scopus citations

Abstract

Gray code addressing is one of the techniques previously proposed to reduce switching activity on high capacitance address bus lines. However in order to convert a system to gray address encoding there are several issues a designer needs to consider. This paper analyzes two issues which include gray code encodings for counter increments other than one and tradeoffs in power consumption incurred due to code conversions (binary to gray, gray to binary) when considering address increments and adders. Results are shown for different encodings and different configurations.

Original languageEnglish (US)
Pages (from-to)178-181
Number of pages4
JournalProceedings of the IEEE Great Lakes Symposium on VLSI
StatePublished - 1996
EventProceedings of the 1996 6th Great Lakes Symposium on VLSI, GLSVLSI - Ames, IA, USA
Duration: Mar 22 1996Mar 23 1996

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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