Steep slope 2D strain field effect transistor: 2D-SFET

Daniel Schulman; Andrew Arnold; Saptarshi Das

doi:10.1109/VLSI-TSA.2018.8403841

Steep slope 2D strain field effect transistor: 2D-SFET

Daniel Schulman, Andrew Arnold, Saptarshi Das

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

Numerous advancements have allowed continuous aggressive dimensional scaling of CMOS to the current state of the art 10nm node but none are solutions to the fundamental Boltzmann statistics limits which have stalled Dennard voltage scaling. The semiconductor industry has invested heavily in disruptive, 'steep slope' transistor technologies which promise lower operating voltages and dramatically reduced power consumption. While many of these technologies show great promise such as Tunnel FETs, Phase Change FETs, and even nanomechanical switches, all are far from commercialization and large-scale integration due to issues ranging from poor ON currents, limited switching ranges and reliability[4, 5].

Original language	English (US)
Title of host publication	2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1-2
Number of pages	2
ISBN (Electronic)	9781538648254
DOIs	https://doi.org/10.1109/VLSI-TSA.2018.8403841
State	Published - Jul 3 2018
Event	2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018 - Hsinchu, Taiwan, Province of China Duration: Apr 16 2018 → Apr 19 2018

Publication series

Name	2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018

Other

Other	2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	4/16/18 → 4/19/18

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Instrumentation
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/VLSI-TSA.2018.8403841

Cite this

Schulman, D., Arnold, A., & Das, S. (2018). Steep slope 2D strain field effect transistor: 2D-SFET. In 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018 (pp. 1-2). (2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2018.8403841

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title = "Steep slope 2D strain field effect transistor: 2D-SFET",

abstract = "Numerous advancements have allowed continuous aggressive dimensional scaling of CMOS to the current state of the art 10nm node but none are solutions to the fundamental Boltzmann statistics limits which have stalled Dennard voltage scaling. The semiconductor industry has invested heavily in disruptive, 'steep slope' transistor technologies which promise lower operating voltages and dramatically reduced power consumption. While many of these technologies show great promise such as Tunnel FETs, Phase Change FETs, and even nanomechanical switches, all are far from commercialization and large-scale integration due to issues ranging from poor ON currents, limited switching ranges and reliability[4, 5].",

author = "Daniel Schulman and Andrew Arnold and Saptarshi Das",

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Schulman, D, Arnold, A & Das, S 2018, Steep slope 2D strain field effect transistor: 2D-SFET. in 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018. 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018, Institute of Electrical and Electronics Engineers Inc., pp. 1-2, 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018, Hsinchu, Taiwan, Province of China, 4/16/18. https://doi.org/10.1109/VLSI-TSA.2018.8403841

Steep slope 2D strain field effect transistor: 2D-SFET. / Schulman, Daniel; Arnold, Andrew; Das, Saptarshi.
2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-2 (2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - Numerous advancements have allowed continuous aggressive dimensional scaling of CMOS to the current state of the art 10nm node but none are solutions to the fundamental Boltzmann statistics limits which have stalled Dennard voltage scaling. The semiconductor industry has invested heavily in disruptive, 'steep slope' transistor technologies which promise lower operating voltages and dramatically reduced power consumption. While many of these technologies show great promise such as Tunnel FETs, Phase Change FETs, and even nanomechanical switches, all are far from commercialization and large-scale integration due to issues ranging from poor ON currents, limited switching ranges and reliability[4, 5].

AB - Numerous advancements have allowed continuous aggressive dimensional scaling of CMOS to the current state of the art 10nm node but none are solutions to the fundamental Boltzmann statistics limits which have stalled Dennard voltage scaling. The semiconductor industry has invested heavily in disruptive, 'steep slope' transistor technologies which promise lower operating voltages and dramatically reduced power consumption. While many of these technologies show great promise such as Tunnel FETs, Phase Change FETs, and even nanomechanical switches, all are far from commercialization and large-scale integration due to issues ranging from poor ON currents, limited switching ranges and reliability[4, 5].

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Schulman D, Arnold A, Das S. Steep slope 2D strain field effect transistor: 2D-SFET. In 2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1-2. (2018 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2018). doi: 10.1109/VLSI-TSA.2018.8403841

Steep slope 2D strain field effect transistor: 2D-SFET

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