Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications

Huichu Liu; Suman Datta; Vijaykrishnan Narayanan

doi:10.1109/ISLPED.2013.6629285

Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications

Huichu Liu
, Suman Datta
, Vijaykrishnan Narayanan

Computer Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

87 Scopus citations

Abstract

Steep switching Tunnel FETs (TFET) can extend the supply voltage scaling with improved energy efficiency for both digital and analog/RF application. In this paper, recent approaches on III-V Tunnel FET device design, prototype device demonstration, modeling techniques and performance evaluations for digital and analog/RF application are discussed and compared to CMOS technology. The impact of steep switching, uni-directional conduction and negative differential resistance characteristics are explored from circuit design perspective. Circuit-level implementation such as III-V TFET based Adder and SRAM design shows significant improvement on energy efficiency and power reduction below 0.3V for digital application. The analog/RF metric evaluation is presented including g_m/I_ds metric, temperature sensitivity, parasitic impact and noise performance. TFETs exhibit promising performance for high frequency, high sensitivity and ultra-low power RF rectifier application.

Original language	English (US)
Title of host publication	Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2013
Pages	145-150
Number of pages	6
DOIs	https://doi.org/10.1109/ISLPED.2013.6629285
State	Published - 2013
Event	2013 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2013 - Beijing, China Duration: Sep 4 2013 → Sep 6 2013

Publication series

Name	Proceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)	1533-4678

Other

Other	2013 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2013
Country/Territory	China
City	Beijing
Period	9/4/13 → 9/6/13

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

All Science Journal Classification (ASJC) codes

General Engineering

Access to Document

10.1109/ISLPED.2013.6629285

Cite this

Liu, H., Datta, S., & Narayanan, V. (2013). Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications. In Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2013 (pp. 145-150). Article 6629285 (Proceedings of the International Symposium on Low Power Electronics and Design). https://doi.org/10.1109/ISLPED.2013.6629285

Liu, Huichu ; Datta, Suman ; Narayanan, Vijaykrishnan. / Steep switching tunnel FET : A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications. Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2013. 2013. pp. 145-150 (Proceedings of the International Symposium on Low Power Electronics and Design).

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title = "Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications",

abstract = "Steep switching Tunnel FETs (TFET) can extend the supply voltage scaling with improved energy efficiency for both digital and analog/RF application. In this paper, recent approaches on III-V Tunnel FET device design, prototype device demonstration, modeling techniques and performance evaluations for digital and analog/RF application are discussed and compared to CMOS technology. The impact of steep switching, uni-directional conduction and negative differential resistance characteristics are explored from circuit design perspective. Circuit-level implementation such as III-V TFET based Adder and SRAM design shows significant improvement on energy efficiency and power reduction below 0.3V for digital application. The analog/RF metric evaluation is presented including gm/Ids metric, temperature sensitivity, parasitic impact and noise performance. TFETs exhibit promising performance for high frequency, high sensitivity and ultra-low power RF rectifier application.",

author = "Huichu Liu and Suman Datta and Vijaykrishnan Narayanan",

year = "2013",

doi = "10.1109/ISLPED.2013.6629285",

language = "English (US)",

isbn = "9781479912353",

series = "Proceedings of the International Symposium on Low Power Electronics and Design",

pages = "145--150",

booktitle = "Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2013",

note = "2013 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2013 ; Conference date: 04-09-2013 Through 06-09-2013",

}

Liu, H, Datta, S & Narayanan, V 2013, Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications. in Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2013., 6629285, Proceedings of the International Symposium on Low Power Electronics and Design, pp. 145-150, 2013 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2013, Beijing, China, 9/4/13. https://doi.org/10.1109/ISLPED.2013.6629285

Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications. / Liu, Huichu; Datta, Suman; Narayanan, Vijaykrishnan.
Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2013. 2013. p. 145-150 6629285 (Proceedings of the International Symposium on Low Power Electronics and Design).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - Steep switching Tunnel FETs (TFET) can extend the supply voltage scaling with improved energy efficiency for both digital and analog/RF application. In this paper, recent approaches on III-V Tunnel FET device design, prototype device demonstration, modeling techniques and performance evaluations for digital and analog/RF application are discussed and compared to CMOS technology. The impact of steep switching, uni-directional conduction and negative differential resistance characteristics are explored from circuit design perspective. Circuit-level implementation such as III-V TFET based Adder and SRAM design shows significant improvement on energy efficiency and power reduction below 0.3V for digital application. The analog/RF metric evaluation is presented including gm/Ids metric, temperature sensitivity, parasitic impact and noise performance. TFETs exhibit promising performance for high frequency, high sensitivity and ultra-low power RF rectifier application.

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Liu H, Datta S, Narayanan V. Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications. In Proceedings of the International Symposium on Low Power Electronics and Design, ISLPED 2013. 2013. p. 145-150. 6629285. (Proceedings of the International Symposium on Low Power Electronics and Design). doi: 10.1109/ISLPED.2013.6629285

Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications

Abstract

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UN SDGs

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