Abstract
A hybrid digital-filter implementation technique is presented that combines a combinatorial vector multiplication technique with a residue number architecture. The hybrid technique eliminates general multiplication and leads to a parallel residue structure that is suitable for implementation with multiple microprocessors. The implementation is efficient because each processor operates with simple residue arithmetic; i. e. , none of the processors is required to handle multibyte operands. An alternative residue algorithm is described for microprocessor implementation of nonrecursive adaptive filters.
| Original language | English (US) |
|---|---|
| Pages | 58-62 |
| Number of pages | 5 |
| State | Published - 1977 |
| Event | Proc of the Midwest Symp on Circuits and Syst, 20th, Tex Tech Univ - Lubbock, TX, USA Duration: Aug 15 1977 → Aug 17 1977 |
Other
| Other | Proc of the Midwest Symp on Circuits and Syst, 20th, Tex Tech Univ |
|---|---|
| City | Lubbock, TX, USA |
| Period | 8/15/77 → 8/17/77 |
All Science Journal Classification (ASJC) codes
- General Engineering