Abstract
The energy consumption of a system depends upon the hardware and software component of a system. Since it is the software which drives the hardware in most systems, decisions taken during software design has significant impact on the energy consumption of the processor. The paper focuses on decreasing energy consumption of a processor using software techniques. A novel compiler technique is proposed which reduces energy consumption by proper register labeling during the compilation phase. The idea behind this technique is to reduce the energy of the processor by reducing the energy of the instruction register (also the instruction data bus) and the register file decoder by encoding the register labels such that the sum of the switching costs between all the register labels in the transition graph is minimized. There is no hardware penalty since this is purely a compiler optimization. Results on benchmarks show that the energy consumption of the DLX processor can be reduced by 9.82% (maximum) and 4.25% (average) (as measured by DLX energy simulator). In addition several compiler techniques such as loop unrolling, software pipelining, recursion elimination and of effects of different algorithms on power and energy consumption are studied. This evaluation methodology is useful for computer architects to evaluate energy improvements of their hardware, compiler writers to evaluate energy of the compiled code and program writers to evaluate energy of data structures and algorithms.
Original language | English (US) |
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Pages | 72-75 |
Number of pages | 4 |
DOIs | |
State | Published - 1997 |
Event | Proceedings of the 1997 International Symposium on Low Power Electronics and Design - Monterey, CA, USA Duration: Aug 18 1997 → Aug 20 1997 |
Other
Other | Proceedings of the 1997 International Symposium on Low Power Electronics and Design |
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City | Monterey, CA, USA |
Period | 8/18/97 → 8/20/97 |
All Science Journal Classification (ASJC) codes
- General Engineering