The arithmetic cube II: A second generation VLSI DSP processor

Mary Jane Irwin; Robert M. Owens; Thomas P. Kelliher; Kin Ki Leung; Mohan Vishwanath

The arithmetic cube II: A second generation VLSI DSP processor

Mary Jane Irwin, Robert M. Owens, Thomas P. Kelliher, Kin Ki Leung, Mohan Vishwanath

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A description is given of the synthesis, design, and simulation of the arithmetic cube II, a second-generation, high-performance digital signal processing architecture. The architecture implements the so-called small-n algorithms. The authors are currently building a prototype system which should be capable of computing a 1024 point complex DFT in 410 μs.

Original language	English (US)
Title of host publication	Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing
Editors	Anon
Publisher	Publ by IEEE
Pages	1125-1128
Number of pages	4
Volume	2
ISBN (Print)	078030033
State	Published - 1991
Event	Proceedings of the 1991 International Conference on Acoustics, Speech, and Signal Processing - ICASSP 91 - Toronto, Ont, Can Duration: May 14 1991 → May 17 1991

Other

Other	Proceedings of the 1991 International Conference on Acoustics, Speech, and Signal Processing - ICASSP 91
City	Toronto, Ont, Can
Period	5/14/91 → 5/17/91

All Science Journal Classification (ASJC) codes

Signal Processing
Electrical and Electronic Engineering
Acoustics and Ultrasonics

Cite this

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title = "The arithmetic cube II: A second generation VLSI DSP processor",

abstract = "A description is given of the synthesis, design, and simulation of the arithmetic cube II, a second-generation, high-performance digital signal processing architecture. The architecture implements the so-called small-n algorithms. The authors are currently building a prototype system which should be capable of computing a 1024 point complex DFT in 410 μs.",

author = "Irwin, {Mary Jane} and Owens, {Robert M.} and Kelliher, {Thomas P.} and Leung, {Kin Ki} and Mohan Vishwanath",

year = "1991",

language = "English (US)",

isbn = "078030033",

volume = "2",

pages = "1125--1128",

editor = "Anon",

booktitle = "Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing",

publisher = "Publ by IEEE",

note = "Proceedings of the 1991 International Conference on Acoustics, Speech, and Signal Processing - ICASSP 91 ; Conference date: 14-05-1991 Through 17-05-1991",

}

Irwin, MJ, Owens, RM, Kelliher, TP, Leung, KK & Vishwanath, M 1991, The arithmetic cube II: A second generation VLSI DSP processor. in Anon (ed.), Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing. vol. 2, Publ by IEEE, pp. 1125-1128, Proceedings of the 1991 International Conference on Acoustics, Speech, and Signal Processing - ICASSP 91, Toronto, Ont, Can, 5/14/91.

TY - GEN

T1 - The arithmetic cube II

T2 - Proceedings of the 1991 International Conference on Acoustics, Speech, and Signal Processing - ICASSP 91

AU - Irwin, Mary Jane

AU - Owens, Robert M.

AU - Kelliher, Thomas P.

AU - Leung, Kin Ki

AU - Vishwanath, Mohan

PY - 1991

Y1 - 1991

N2 - A description is given of the synthesis, design, and simulation of the arithmetic cube II, a second-generation, high-performance digital signal processing architecture. The architecture implements the so-called small-n algorithms. The authors are currently building a prototype system which should be capable of computing a 1024 point complex DFT in 410 μs.

AB - A description is given of the synthesis, design, and simulation of the arithmetic cube II, a second-generation, high-performance digital signal processing architecture. The architecture implements the so-called small-n algorithms. The authors are currently building a prototype system which should be capable of computing a 1024 point complex DFT in 410 μs.

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UR - http://www.scopus.com/inward/citedby.url?scp=0026390894&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0026390894

SN - 078030033

VL - 2

SP - 1125

EP - 1128

BT - Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing

A2 - Anon, null

PB - Publ by IEEE

Y2 - 14 May 1991 through 17 May 1991

ER -

The arithmetic cube II: A second generation VLSI DSP processor

Abstract

Other

All Science Journal Classification (ASJC) codes

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