The Arithmetic Cube II is a high performance signal processing system designed and built at Penn State University. The architecture implements the so-called small-n algorithms, and is the first system making use of this approach to signal processing. The system is capable of computing a 1008 point complex-in complex-out DFT in 3.54 ms. This high performance rate is achieved using very modest technology (2 micron CMOS). This paper provides an overview of the small-n algorithms, then describes the architectural design and implementation of the system, the transform development environment, and reports results of operating the system.
|Original language||English (US)|
|Number of pages||12|
|Journal||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|State||Published - Dec 1993|
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering