Thermal Optimization of the Buffer Layer Thickness of GaN HEMTs

This work presents a comprehensive study that systematically optimizes the buffer layer thickness of gallium nitride (GaN) high-electron-mobility transistors (HEMTs) in order to minimize the device thermal resistance (R_Th). Time-domain thermoreflectance (TDTR) and Callaway’s phonon gas model were used to create a temperature-dependent anisotropic thermal conductivity (κ) dataset of GaN films for a thickness range of 0.2–2 µm. Device thermal models that employ the κ data and the measured thermal boundary resistance (TBR) at the GaN/SiC interface were created and validated using Raman thermometry. The models were used to perform thermal optimization of the GaN buffer thickness. For a TBR of ~3 m² ·K/GW and fully open channel operation, reducing the buffer thickness from 2 to 0.2 µm decreases the R_Th of single-, two-, and six-finger HEMTs by 4.9%–5.1%. However, when the TBR exceeds 6 m² ·K/GW, thicker buffers are favorable. The operational bias condition also plays a pivotal role. Under a partially pinched-off condition (for a TBR of ~3 m² ·K/GW), a thicker buffer (2 versus 0.2 µm) reduces the R_Th by 26%. In addition, κ models relying on room-temperature or isotropic values were found to lead to incorrect buffer layer design. These results underscore the importance of incorporating accurate κ data, TBR, and operational bias conditions into the GaN buffer design to minimize the R_Th of GaN HEMTs.