Top-gated graphene field-effect transistors using graphene on si (111) wafers

  • J. S. Moon
  • , D. Curtis
  • , S. Bui
  • , T. Marshall
  • , D. Wheeler
  • , I. Valles
  • , S. Kim
  • , E. Wang
  • , X. Weng
  • , M. Fanton

    Research output: Contribution to journalArticlepeer-review

    39 Scopus citations

    Abstract

    In this letter, we report the first experimental demonstration of wafer-scale ambipolar field-effect transistor (FET) on Si (111) substrates by synthesizing a graphene layer on top of 3CSiC(111)/Si(111) substrates. With lateral scaling of the sourcedrain distance to 1 μm in a top-gated layout, the on-state current of 225 μA/μm and peak transconductance of 40\μS/μm were obtained at Vds = 2\V, which is the highest performance of graphene-on-Si FETs. The peak field-effect mobilities of 285 cm2/Vs for holes and 175 cm2/Vs for electrons were demonstrated, which is higher than that of ultra-thin-body SOI (n, p) MOSFETs.

    Original languageEnglish (US)
    Article number5565389
    Pages (from-to)1193-1195
    Number of pages3
    JournalIEEE Electron Device Letters
    Volume31
    Issue number11
    DOIs
    StatePublished - Nov 2010

    All Science Journal Classification (ASJC) codes

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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