Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes

Daniel J. Lichtenwalner; Jennifer M. Hydrick; Viera Vankova; Veena Misra; Jon Paul Maria; Angus I. Kingon

doi:10.1149/1.2355734

Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes

Daniel J. Lichtenwalner, Jennifer M. Hydrick, Viera Vankova, Veena Misra, Jon Paul Maria, Angus I. Kingon

Materials Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Scopus citations

Abstract

Silicon on insulator (SOI) substrates will be required to reduce capacitive coupling and other parasitic effects as device scaling continues. ITRS projections point to a future need for SOI buried oxide layers as thin as 10 nm, and Si channel thickness potentially as low as 5 nm for fully-depleted ultra-thin-body devices. For such thin layers, conventional SOI fabrication processes become increasingly difficult. Progress towards fabricating ultra-thin SOI on Si(001) through an all-growth approach is presented. All steps are performed sequentially in situ, with no wet chemical processing. Starting with a Si wafer as large as 8", our approach is to: 1) deposit a thin commensurate epitaxial oxide layer such as Ca_1-xSr _xTiO₃; 2) oxidize to grow an interface SiO₂: layer ('floating' the epitaxial oxide) for stress relief and lowering of the dielectric constant; and 3) deposit epitaxial Si or Si_1-xGe _x to complete the fabrication process. copyright The Electrochemical Society.

Original language	English (US)
Title of host publication	Physics and Technology of High-k Gate Dielectrics 4
Publisher	Electrochemical Society Inc.
Pages	449-460
Number of pages	12
Edition	3
ISBN (Electronic)	1566775035
DOIs	https://doi.org/10.1149/1.2355734
State	Published - 2006
Event	Physics and Technology of High-k Gate Dielectrics 4 - 210th Electrochemical Society Meeting - Cancun, Mexico Duration: Oct 29 2006 → Nov 3 2006

Publication series

Name	ECS Transactions
Number	3
Volume	3
ISSN (Print)	1938-5862
ISSN (Electronic)	1938-6737

Other

Other	Physics and Technology of High-k Gate Dielectrics 4 - 210th Electrochemical Society Meeting
Country/Territory	Mexico
City	Cancun
Period	10/29/06 → 11/3/06

All Science Journal Classification (ASJC) codes

General Engineering

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10.1149/1.2355734

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Lichtenwalner, D. J., Hydrick, J. M., Vankova, V., Misra, V., Maria, J. P., & Kingon, A. I. (2006). Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes. In Physics and Technology of High-k Gate Dielectrics 4 (3 ed., pp. 449-460). (ECS Transactions; Vol. 3, No. 3). Electrochemical Society Inc.. https://doi.org/10.1149/1.2355734

@inproceedings{e3d8ea06e9874e75938f3c634865a69b,

title = "Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes",

abstract = "Silicon on insulator (SOI) substrates will be required to reduce capacitive coupling and other parasitic effects as device scaling continues. ITRS projections point to a future need for SOI buried oxide layers as thin as 10 nm, and Si channel thickness potentially as low as 5 nm for fully-depleted ultra-thin-body devices. For such thin layers, conventional SOI fabrication processes become increasingly difficult. Progress towards fabricating ultra-thin SOI on Si(001) through an all-growth approach is presented. All steps are performed sequentially in situ, with no wet chemical processing. Starting with a Si wafer as large as 8{"}, our approach is to: 1) deposit a thin commensurate epitaxial oxide layer such as Ca1-xSr xTiO3; 2) oxidize to grow an interface SiO2: layer ('floating' the epitaxial oxide) for stress relief and lowering of the dielectric constant; and 3) deposit epitaxial Si or Si1-xGe x to complete the fabrication process. copyright The Electrochemical Society.",

author = "Lichtenwalner, {Daniel J.} and Hydrick, {Jennifer M.} and Viera Vankova and Veena Misra and Maria, {Jon Paul} and Kingon, {Angus I.}",

year = "2006",

doi = "10.1149/1.2355734",

language = "English (US)",

series = "ECS Transactions",

publisher = "Electrochemical Society Inc.",

number = "3",

pages = "449--460",

booktitle = "Physics and Technology of High-k Gate Dielectrics 4",

edition = "3",

note = "Physics and Technology of High-k Gate Dielectrics 4 - 210th Electrochemical Society Meeting ; Conference date: 29-10-2006 Through 03-11-2006",

}

Lichtenwalner, DJ, Hydrick, JM, Vankova, V, Misra, V, Maria, JP & Kingon, AI 2006, Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes. in Physics and Technology of High-k Gate Dielectrics 4. 3 edn, ECS Transactions, no. 3, vol. 3, Electrochemical Society Inc., pp. 449-460, Physics and Technology of High-k Gate Dielectrics 4 - 210th Electrochemical Society Meeting, Cancun, Mexico, 10/29/06. https://doi.org/10.1149/1.2355734

Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes. / Lichtenwalner, Daniel J.; Hydrick, Jennifer M.; Vankova, Viera et al.
Physics and Technology of High-k Gate Dielectrics 4. 3. ed. Electrochemical Society Inc., 2006. p. 449-460 (ECS Transactions; Vol. 3, No. 3).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes

AU - Lichtenwalner, Daniel J.

AU - Hydrick, Jennifer M.

AU - Vankova, Viera

AU - Misra, Veena

AU - Maria, Jon Paul

AU - Kingon, Angus I.

PY - 2006

Y1 - 2006

N2 - Silicon on insulator (SOI) substrates will be required to reduce capacitive coupling and other parasitic effects as device scaling continues. ITRS projections point to a future need for SOI buried oxide layers as thin as 10 nm, and Si channel thickness potentially as low as 5 nm for fully-depleted ultra-thin-body devices. For such thin layers, conventional SOI fabrication processes become increasingly difficult. Progress towards fabricating ultra-thin SOI on Si(001) through an all-growth approach is presented. All steps are performed sequentially in situ, with no wet chemical processing. Starting with a Si wafer as large as 8", our approach is to: 1) deposit a thin commensurate epitaxial oxide layer such as Ca1-xSr xTiO3; 2) oxidize to grow an interface SiO2: layer ('floating' the epitaxial oxide) for stress relief and lowering of the dielectric constant; and 3) deposit epitaxial Si or Si1-xGe x to complete the fabrication process. copyright The Electrochemical Society.

AB - Silicon on insulator (SOI) substrates will be required to reduce capacitive coupling and other parasitic effects as device scaling continues. ITRS projections point to a future need for SOI buried oxide layers as thin as 10 nm, and Si channel thickness potentially as low as 5 nm for fully-depleted ultra-thin-body devices. For such thin layers, conventional SOI fabrication processes become increasingly difficult. Progress towards fabricating ultra-thin SOI on Si(001) through an all-growth approach is presented. All steps are performed sequentially in situ, with no wet chemical processing. Starting with a Si wafer as large as 8", our approach is to: 1) deposit a thin commensurate epitaxial oxide layer such as Ca1-xSr xTiO3; 2) oxidize to grow an interface SiO2: layer ('floating' the epitaxial oxide) for stress relief and lowering of the dielectric constant; and 3) deposit epitaxial Si or Si1-xGe x to complete the fabrication process. copyright The Electrochemical Society.

UR - http://www.scopus.com/inward/record.url?scp=33846972358&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33846972358&partnerID=8YFLogxK

U2 - 10.1149/1.2355734

DO - 10.1149/1.2355734

M3 - Conference contribution

AN - SCOPUS:33846972358

T3 - ECS Transactions

SP - 449

EP - 460

BT - Physics and Technology of High-k Gate Dielectrics 4

PB - Electrochemical Society Inc.

T2 - Physics and Technology of High-k Gate Dielectrics 4 - 210th Electrochemical Society Meeting

Y2 - 29 October 2006 through 3 November 2006

ER -

Towards the fabrication of ultra-thin SOI on Si (001) using epitaxial oxide and epitaxial semiconductor growth processes

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