Abstract
We present 6T SRAMs with pass-gate feedback using tri-mode independent gate (TMIG) FinFETs as the access transistors. We perform a comprehensive analysis of TMIG FinFETs and the proposed SRAM cell using our simulation framework, which is based on the non-equilibrium Green's function models for FinFETs. We compare our technique with the tied gate (TG) FinFET SRAM and the previously proposed independent gate (IG) FinFET SRAM with pass-gate feedback. The effects of quantum confinement in scaled FinFETs on the device and SRAM characteristics are analyzed in detail. We show that quantum confinement effects lead to severe degradation in access time and write-ability of the IG FinFET SRAM. On the other hand, the SRAM cell proposed in this paper shows 14% improvement in write-ability over the TG FinFET SRAM with comparable read stability, achieving mitigation of the read-write conflict. At the same time, 30% reduction in standby leakage and comparable hold stability is achieved at no cell area penalty, with only 14% increase in the cell access time. We also show that the array-level issues associated with pass-gate feedback are mitigated using the co-design technique presented in this paper.
Original language | English (US) |
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Article number | 6626657 |
Pages (from-to) | 3696-3704 |
Number of pages | 9 |
Journal | IEEE Transactions on Electron Devices |
Volume | 60 |
Issue number | 11 |
DOIs | |
State | Published - 2013 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering