TSV-free FinFET-based Monolithic 3D+-IC with computing-in-memory SRAM cell for intelligent IoT devices

Fu Kuo Hsueh; Hsiao Yun Chiu; Chang Hong Shen; Jia Min Shieh; Ying Tsan Tang; Chih Chao Yang; Hsiu Chih Chen; Wen Hsien Huang; Bo Yuan Chen; Kun Ming Chen; Guo Wei Huang; Wei Hao Chen; Kuo Hsiang Hsu; Srivatsa Rangachar Srinivasa; Nicholas Jao; Albert Lee; Hochul Lee; Vijaykrishnan Narayanan; Kang Lung Wang; Meng Fan Chang; Wen Kuan Yeh

doi:10.1109/IEDM.2017.8268380

TSV-free FinFET-based Monolithic 3D⁺-IC with computing-in-memory SRAM cell for intelligent IoT devices

Fu Kuo Hsueh
, Hsiao Yun Chiu
, Chang Hong Shen
, Jia Min Shieh
, Ying Tsan Tang
, Chih Chao Yang
, Hsiu Chih Chen
, Wen Hsien Huang
, Bo Yuan Chen
, Kun Ming Chen
, Guo Wei Huang
, Wei Hao Chen
, Kuo Hsiang Hsu
, Srivatsa Rangachar Srinivasa
, Nicholas Jao
, Albert Lee
, Hochul Lee
, Vijaykrishnan Narayanan
, Kang Lung Wang
, Meng Fan Chang

Wen Kuan Yeh

Computer Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

20 Scopus citations

Abstract

This paper presents the first monolithic 3D vertical cross-tier computing-in-memory (CIM) SRAM cell fabricated using low cost TSV-free FinFET-based 3D⁺-IC technology. The 9T 3D CIM SRAM cell is able to compute NAND/AND, OR/NOR and XOR/XNOR operations within a single memory cycle. We fabricated stackable multi-fin single-grained Si FinFET using low thermal-budget CO₂ far-infrared laser annealing (FIR-LA) for activation and self-aligned silicide. The proposed device achieved high Ion (320 μA/μm (n-FET) and 275 μA/μm (p-FET)) and high I_on/I_off (>10⁷). The proposed scheme enables the fabrication of energy and area efficient circuits for cost-aware intelligent IoT devices. For proposed 9T CIM SRAM cell, the monolithic 3D device reduces area overhead by 51%, compared to the 2D version, thanks to the stacking of three additional transistors above the 6T SRAM cell.

Original language	English (US)
Title of host publication	2017 IEEE International Electron Devices Meeting, IEDM 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	12.6.1-12.6.4
ISBN (Electronic)	9781538635599
DOIs	https://doi.org/10.1109/IEDM.2017.8268380
State	Published - Jan 23 2018
Event	63rd IEEE International Electron Devices Meeting, IEDM 2017 - San Francisco, United States Duration: Dec 2 2017 → Dec 6 2017

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Other

Other	63rd IEEE International Electron Devices Meeting, IEDM 2017
Country/Territory	United States
City	San Francisco
Period	12/2/17 → 12/6/17

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Access to Document

10.1109/IEDM.2017.8268380

Cite this

Hsueh, F. K., Chiu, H. Y., Shen, C. H., Shieh, J. M., Tang, Y. T., Yang, C. C., Chen, H. C., Huang, W. H., Chen, B. Y., Chen, K. M., Huang, G. W., Chen, W. H., Hsu, K. H., Srinivasa, S. R., Jao, N., Lee, A., Lee, H., Narayanan, V., Wang, K. L., ... Yeh, W. K. (2018). TSV-free FinFET-based Monolithic 3D⁺-IC with computing-in-memory SRAM cell for intelligent IoT devices. In 2017 IEEE International Electron Devices Meeting, IEDM 2017 (pp. 12.6.1-12.6.4). (Technical Digest - International Electron Devices Meeting, IEDM). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM.2017.8268380

Hsueh, Fu Kuo ; Chiu, Hsiao Yun ; Shen, Chang Hong et al. / TSV-free FinFET-based Monolithic 3D⁺-IC with computing-in-memory SRAM cell for intelligent IoT devices. 2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 12.6.1-12.6.4 (Technical Digest - International Electron Devices Meeting, IEDM).

@inproceedings{484117a3f49242e18d80064efe3fed85,

title = "TSV-free FinFET-based Monolithic 3D+-IC with computing-in-memory SRAM cell for intelligent IoT devices",

abstract = "This paper presents the first monolithic 3D vertical cross-tier computing-in-memory (CIM) SRAM cell fabricated using low cost TSV-free FinFET-based 3D+-IC technology. The 9T 3D CIM SRAM cell is able to compute NAND/AND, OR/NOR and XOR/XNOR operations within a single memory cycle. We fabricated stackable multi-fin single-grained Si FinFET using low thermal-budget CO2 far-infrared laser annealing (FIR-LA) for activation and self-aligned silicide. The proposed device achieved high Ion (320 μA/μm (n-FET) and 275 μA/μm (p-FET)) and high Ion/Ioff (>107). The proposed scheme enables the fabrication of energy and area efficient circuits for cost-aware intelligent IoT devices. For proposed 9T CIM SRAM cell, the monolithic 3D device reduces area overhead by 51\%, compared to the 2D version, thanks to the stacking of three additional transistors above the 6T SRAM cell.",

author = "Hsueh, \{Fu Kuo\} and Chiu, \{Hsiao Yun\} and Shen, \{Chang Hong\} and Shieh, \{Jia Min\} and Tang, \{Ying Tsan\} and Yang, \{Chih Chao\} and Chen, \{Hsiu Chih\} and Huang, \{Wen Hsien\} and Chen, \{Bo Yuan\} and Chen, \{Kun Ming\} and Huang, \{Guo Wei\} and Chen, \{Wei Hao\} and Hsu, \{Kuo Hsiang\} and Srinivasa, \{Srivatsa Rangachar\} and Nicholas Jao and Albert Lee and Hochul Lee and Vijaykrishnan Narayanan and Wang, \{Kang Lung\} and Chang, \{Meng Fan\} and Yeh, \{Wen Kuan\}",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 63rd IEEE International Electron Devices Meeting, IEDM 2017 ; Conference date: 02-12-2017 Through 06-12-2017",

year = "2018",

month = jan,

day = "23",

doi = "10.1109/IEDM.2017.8268380",

language = "English (US)",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "12.6.1--12.6.4",

booktitle = "2017 IEEE International Electron Devices Meeting, IEDM 2017",

address = "United States",

}

Hsueh, FK, Chiu, HY, Shen, CH, Shieh, JM, Tang, YT, Yang, CC, Chen, HC, Huang, WH, Chen, BY, Chen, KM, Huang, GW, Chen, WH, Hsu, KH, Srinivasa, SR, Jao, N, Lee, A, Lee, H, Narayanan, V, Wang, KL, Chang, MF & Yeh, WK 2018, TSV-free FinFET-based Monolithic 3D⁺-IC with computing-in-memory SRAM cell for intelligent IoT devices. in 2017 IEEE International Electron Devices Meeting, IEDM 2017. Technical Digest - International Electron Devices Meeting, IEDM, Institute of Electrical and Electronics Engineers Inc., pp. 12.6.1-12.6.4, 63rd IEEE International Electron Devices Meeting, IEDM 2017, San Francisco, United States, 12/2/17. https://doi.org/10.1109/IEDM.2017.8268380

TSV-free FinFET-based Monolithic 3D⁺-IC with computing-in-memory SRAM cell for intelligent IoT devices. / Hsueh, Fu Kuo; Chiu, Hsiao Yun; Shen, Chang Hong et al.
2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 12.6.1-12.6.4 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - TSV-free FinFET-based Monolithic 3D+-IC with computing-in-memory SRAM cell for intelligent IoT devices

AU - Hsueh, Fu Kuo

AU - Chiu, Hsiao Yun

AU - Shen, Chang Hong

AU - Shieh, Jia Min

AU - Tang, Ying Tsan

AU - Yang, Chih Chao

AU - Chen, Hsiu Chih

AU - Huang, Wen Hsien

AU - Chen, Bo Yuan

AU - Chen, Kun Ming

AU - Huang, Guo Wei

AU - Chen, Wei Hao

AU - Hsu, Kuo Hsiang

AU - Srinivasa, Srivatsa Rangachar

AU - Jao, Nicholas

AU - Lee, Albert

AU - Lee, Hochul

AU - Narayanan, Vijaykrishnan

AU - Wang, Kang Lung

AU - Chang, Meng Fan

AU - Yeh, Wen Kuan

PY - 2018/1/23

Y1 - 2018/1/23

N2 - This paper presents the first monolithic 3D vertical cross-tier computing-in-memory (CIM) SRAM cell fabricated using low cost TSV-free FinFET-based 3D+-IC technology. The 9T 3D CIM SRAM cell is able to compute NAND/AND, OR/NOR and XOR/XNOR operations within a single memory cycle. We fabricated stackable multi-fin single-grained Si FinFET using low thermal-budget CO2 far-infrared laser annealing (FIR-LA) for activation and self-aligned silicide. The proposed device achieved high Ion (320 μA/μm (n-FET) and 275 μA/μm (p-FET)) and high Ion/Ioff (>107). The proposed scheme enables the fabrication of energy and area efficient circuits for cost-aware intelligent IoT devices. For proposed 9T CIM SRAM cell, the monolithic 3D device reduces area overhead by 51%, compared to the 2D version, thanks to the stacking of three additional transistors above the 6T SRAM cell.

AB - This paper presents the first monolithic 3D vertical cross-tier computing-in-memory (CIM) SRAM cell fabricated using low cost TSV-free FinFET-based 3D+-IC technology. The 9T 3D CIM SRAM cell is able to compute NAND/AND, OR/NOR and XOR/XNOR operations within a single memory cycle. We fabricated stackable multi-fin single-grained Si FinFET using low thermal-budget CO2 far-infrared laser annealing (FIR-LA) for activation and self-aligned silicide. The proposed device achieved high Ion (320 μA/μm (n-FET) and 275 μA/μm (p-FET)) and high Ion/Ioff (>107). The proposed scheme enables the fabrication of energy and area efficient circuits for cost-aware intelligent IoT devices. For proposed 9T CIM SRAM cell, the monolithic 3D device reduces area overhead by 51%, compared to the 2D version, thanks to the stacking of three additional transistors above the 6T SRAM cell.

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U2 - 10.1109/IEDM.2017.8268380

DO - 10.1109/IEDM.2017.8268380

M3 - Conference contribution

AN - SCOPUS:85045203589

T3 - Technical Digest - International Electron Devices Meeting, IEDM

SP - 12.6.1-12.6.4

BT - 2017 IEEE International Electron Devices Meeting, IEDM 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 63rd IEEE International Electron Devices Meeting, IEDM 2017

Y2 - 2 December 2017 through 6 December 2017

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Hsueh FK, Chiu HY, Shen CH, Shieh JM, Tang YT, Yang CC et al. TSV-free FinFET-based Monolithic 3D⁺-IC with computing-in-memory SRAM cell for intelligent IoT devices. In 2017 IEEE International Electron Devices Meeting, IEDM 2017. Institute of Electrical and Electronics Engineers Inc. 2018. p. 12.6.1-12.6.4. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM.2017.8268380