Tuning data replication for improving behavior of MPSoC applications

O. Ozturk; M. Kandemir; M. J. Irwin; I. Kolcu

doi:10.1145/988952.988994

Tuning data replication for improving behavior of MPSoC applications

O. Ozturk, M. Kandemir, M. J. Irwin, I. Kolcu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

Maintaining cache coherence can be very costly for on-chip multiprocessors from an energy perspective. Observing this, we propose a compiler-directed strategy that replicates array data in cache memories of its potential consumer processors at the time the data is brought from off-chip memory. The goal is to eliminate the energy costs associated with bus snooping without negatively impacting overall performance. Our strategy can perform a much better job as compared to static replication strategies, where each array element is replicated based on the same fixed policy.

Original language	English (US)
Title of host publication	Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004
Subtitle of host publication	VLSI in the Nanometer Era
Publisher	Association for Computing Machinery (ACM)
Pages	170-173
Number of pages	4
ISBN (Print)	1581138539, 9781581138535
DOIs	https://doi.org/10.1145/988952.988994
State	Published - 2004
Event	Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era - Boston, MA, United States Duration: Apr 26 2004 → Apr 28 2004

Publication series

Name	Proceedings of the ACM Great Lakes Symposium on VLSI

Other

Other	Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era
Country/Territory	United States
City	Boston, MA
Period	4/26/04 → 4/28/04

All Science Journal Classification (ASJC) codes

General Engineering

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10.1145/988952.988994

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Ozturk, O., Kandemir, M., Irwin, M. J., & Kolcu, I. (2004). Tuning data replication for improving behavior of MPSoC applications. In Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era (pp. 170-173). (Proceedings of the ACM Great Lakes Symposium on VLSI). Association for Computing Machinery (ACM). https://doi.org/10.1145/988952.988994

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title = "Tuning data replication for improving behavior of MPSoC applications",

abstract = "Maintaining cache coherence can be very costly for on-chip multiprocessors from an energy perspective. Observing this, we propose a compiler-directed strategy that replicates array data in cache memories of its potential consumer processors at the time the data is brought from off-chip memory. The goal is to eliminate the energy costs associated with bus snooping without negatively impacting overall performance. Our strategy can perform a much better job as compared to static replication strategies, where each array element is replicated based on the same fixed policy.",

author = "O. Ozturk and M. Kandemir and Irwin, {M. J.} and I. Kolcu",

year = "2004",

doi = "10.1145/988952.988994",

language = "English (US)",

isbn = "1581138539",

series = "Proceedings of the ACM Great Lakes Symposium on VLSI",

publisher = "Association for Computing Machinery (ACM)",

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booktitle = "Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004",

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note = "Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era ; Conference date: 26-04-2004 Through 28-04-2004",

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Ozturk, O, Kandemir, M, Irwin, MJ & Kolcu, I 2004, Tuning data replication for improving behavior of MPSoC applications. in Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era. Proceedings of the ACM Great Lakes Symposium on VLSI, Association for Computing Machinery (ACM), pp. 170-173, Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era, Boston, MA, United States, 4/26/04. https://doi.org/10.1145/988952.988994

Tuning data replication for improving behavior of MPSoC applications. / Ozturk, O.; Kandemir, M.; Irwin, M. J. et al.
Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era. Association for Computing Machinery (ACM), 2004. p. 170-173 (Proceedings of the ACM Great Lakes Symposium on VLSI).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - Maintaining cache coherence can be very costly for on-chip multiprocessors from an energy perspective. Observing this, we propose a compiler-directed strategy that replicates array data in cache memories of its potential consumer processors at the time the data is brought from off-chip memory. The goal is to eliminate the energy costs associated with bus snooping without negatively impacting overall performance. Our strategy can perform a much better job as compared to static replication strategies, where each array element is replicated based on the same fixed policy.

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ER -

Tuning data replication for improving behavior of MPSoC applications

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