@inproceedings{a9c65ecb1a444249a43b416822941a2c,
title = "Tunnel transistors for energy efficient computing",
abstract = "Tunnel transistor (TFET) is a potential steep slope device enabling supply voltage scaling. TFET is explored at the device and circuit level. Hetero-junction TFET is demonstrated with high drive current and high on-off current ratio. Hetero-junction TFETs with scaled device geometry can outperform Si FinFET at Vcc<0.3V. Design considerations of TFET based circuits for logic and SRAM applications are investigated and performance benchmarked with Si FinFET technology.",
author = "S. Datta and R. Bijesh and H. Liu and D. Mohata and V. Narayanan",
year = "2013",
doi = "10.1109/IRPS.2013.6532046",
language = "English (US)",
isbn = "9781479901135",
series = "IEEE International Reliability Physics Symposium Proceedings",
pages = "6A.3.1--6A.3.7",
booktitle = "2013 IEEE International Reliability Physics Symposium, IRPS 2013",
note = "2013 IEEE International Reliability Physics Symposium, IRPS 2013 ; Conference date: 14-04-2013 Through 18-04-2013",
}