Using data replication to reduce communication energy on chip multiprocessors

M. Kandemir, G. Chen, F. Li, I. Demirkiran

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

Chip multiprocessors are gaining popularity as they are very suitable for data-intensive embedded and high-end processing. In particular, array-intensive embedded image and video applications can benefit a lot from these architectures due to coarse-grain parallelization they offer. However, if not optimized, interprocessor communication can be a major energy consumer. Focusing on a distributed memory chip multiprocessor architecture and array-intensive embedded applications, this paper proposes a compiler-based communication minimization strategy based on data replication. The proposed scheme replicates shared data items across the memories of the processors in a controlled fashion (i.e., under a memory limit), with the goal of eliminating the otherwise necessary interprocessor communication.

Original languageEnglish (US)
Title of host publicationProceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages769-772
Number of pages4
ISBN (Print)0780387368, 9780780387362
DOIs
StatePublished - 2005
Event2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, China
Duration: Jan 18 2005Jan 21 2005

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2

Other

Other2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
Country/TerritoryChina
CityShanghai
Period1/18/051/21/05

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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