van der Waals dielectrics for threshold engineering in two-dimensional field effect transistors

Two-dimensional (2D) semiconductors are promising for next-generation field-effect transistors (FETs), but their integration into complementary-metal-oxide-semiconductors (CMOS) logic is hindered by improper threshold voltages (Vth), leading to excessive power consumption. While past efforts have focused on improving gate electrostatics and near-ideal subthreshold swing (SS), systematic Vth engineering in 2D FETs remains unexplored. Here, we investigate high-κ van der Waals (vdW) dielectrics including metal oxyhalides such as LaOBr, BiOBr, and BiOCl, and bimetallic thiophosphates such as LiInP₂S₆ (LIPS), LiInP₂Se₆ (LIPSe) and CuInP₂S₆ (CIPS), and demonstrate that bimetallic thiophosphates enable programmable and non-volatile Vth tuning in both n-type monolayer MoS₂ and p-type bilayer WSe₂ FETs. Leveraging ion-mediated Vth tuning, we realize 2D CMOS inverters with nearly three orders of magnitude reduction in static power while maintaining high switching speed. Combining experiments with industry-compatible SPICE modeling, we identify an optimal Vth window that minimizes power with negligible delay overhead, enabling built-in power gating and improved power–performance–area metrics without additional sleep transistors.