Variation aware placement for FPGAs

Suresh Srinivasan; Vijaykrishnan Narayanan

doi:10.1109/ISVLSI.2006.92

Variation aware placement for FPGAs

Suresh Srinivasan
, Vijaykrishnan Narayanan

Computer Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

15 Scopus citations

Original language	English (US)
Title of host publication	Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006
Pages	422-423
Number of pages	2
DOIs	https://doi.org/10.1109/ISVLSI.2006.92
State	Published - 2006
Event	IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006 - Klarlsruhe, Germany Duration: Mar 2 2006 → Mar 3 2006

Publication series

Name	Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006
Volume	2006

Other

Other	IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006
Country/Territory	Germany
City	Klarlsruhe
Period	3/2/06 → 3/3/06

All Science Journal Classification (ASJC) codes

General Engineering

Access to Document

10.1109/ISVLSI.2006.92

Cite this

Srinivasan, S., & Narayanan, V. (2006). Variation aware placement for FPGAs. In Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006 (pp. 422-423). Article 1602477 (Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006; Vol. 2006). https://doi.org/10.1109/ISVLSI.2006.92

@inproceedings{44ba143acba94a97aba90dd3f03a0913,

title = "Variation aware placement for FPGAs",

author = "Suresh Srinivasan and Vijaykrishnan Narayanan",

year = "2006",

doi = "10.1109/ISVLSI.2006.92",

language = "English (US)",

isbn = "0769525334",

series = "Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006",

pages = "422--423",

booktitle = "Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006",

note = "IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006 ; Conference date: 02-03-2006 Through 03-03-2006",

}

Srinivasan, S & Narayanan, V 2006, Variation aware placement for FPGAs. in Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006., 1602477, Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006, vol. 2006, pp. 422-423, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006, Klarlsruhe, Germany, 3/2/06. https://doi.org/10.1109/ISVLSI.2006.92

Variation aware placement for FPGAs. / Srinivasan, Suresh; Narayanan, Vijaykrishnan.
Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006. 2006. p. 422-423 1602477 (Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006; Vol. 2006).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Variation aware placement for FPGAs

AU - Srinivasan, Suresh

AU - Narayanan, Vijaykrishnan

PY - 2006

Y1 - 2006

UR - https://www.scopus.com/pages/publications/33749344170

UR - https://www.scopus.com/pages/publications/33749344170#tab=citedBy

U2 - 10.1109/ISVLSI.2006.92

DO - 10.1109/ISVLSI.2006.92

M3 - Conference contribution

AN - SCOPUS:33749344170

SN - 0769525334

SN - 9780769525334

T3 - Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006

SP - 422

EP - 423

BT - Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006

T2 - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006

Y2 - 2 March 2006 through 3 March 2006

ER -

Variation aware placement for FPGAs

Publication series

Other

All Science Journal Classification (ASJC) codes

Access to Document

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Cite this